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Integrated Nanodevice and Nanosystem Fabrication
Since its invention, the integrated circuit has necessitated new process modules and numerous architectural changes to improve application performances, power consumption, and cost reduction. Silicon CMOS is now well established to offer the integration of several tens of billions of devices on a chip or in a system. At present, there are important challenges in the introduction of heterogeneous co-integration of materials and devices with the silicon CMOS 2D- and 3D-based platforms. New fabrication techniques allowing strong energy and variability efficiency come in as possible players to improve the various figures of merit of fabrication technology. Integrated Nanodevice and Nanosystem Fa...
2011 International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors (ULSIC vs. TFT)
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Rapid Thermal Processing for Future Semiconductor Devices
This volume is a collection of papers which were presented at the 2001 International Conference on Rapid Thermal Processing (RTP 2001) held at Ise Shima, Mie, on November 14-16, 2001. This symposium is second conference followed the previous successful first International RTP conference held at Hokkaido in 1997. The RTP 2001 covered the latest developments in RTP and other short-time processing continuously aiming to point out the future direction in the Silicon ULSI devices and II-VI, III-V compound semiconductor devices.This book covers the following areas: advanced MOS gate stack, integration technologies, advancd channel engineering including shallow junction, SiGe, hetero-structure, novel metallization, inter-connect, silicidation, low-k materials, thin dielectrics including gate dielectrics and high-k materials, thin film deposition including SiGe, SOI and SiC, process and device modelling, Laser-assisted crystallization and TFT device fabrication technologies, temperature monitoring and slip-free technologies.
ULSI Process Integration 6
ULSI Process Integration 6 covers all aspects of process integration. Sections are devoted to 1) Device Technologies, 2) Front-end-of-line integration (gate stacks, shallow junctions, dry etching, etc.), 3) Back-end-of-line integration (CMP, low-k, Cu interconnect, air-gaps, 3D packaging, etc.), 4) Alternative channel technologies (Ge, III-V, hybrid integration), and 5) Emerging technologies (CNT, graphene, polymer electronics, nanotubes).
ULSI Process Integration 5
The symposium provided a forum for reviewing and discussing all aspects of process integration, with special focus on nanoscaled technologies, 65 nm and beyond on DRAM, SRAM, flash memory, high density logic-low power, RF, mixed analog-digital, process integration yield, CMP chemistries, low-k processes, gate stacks, metal gates, rapid thermal processing, silicides, copper interconnects, carbon nanotubes, novel materials, high mobility substrates (SOI, sSi, SiGe, GeOI), strain engineering, and hybrid integration.
Silicon Epitaxy
Since its inception in 1966, the series of numbered volumes known as Semiconductors and Semimetals has distinguished itself through the careful selection of well-known authors, editors, and contributors. The Willardson and Beer series, as it is widely known, has succeeded in producing numerous landmark volumes and chapters. Not only did many of these volumes make an impact at the time of their publication, but they continue to be well-cited years after their original release. Recently, Professor Eicke R. Weber of the University of California at Berkeley joined as a co-editor of the series. Professor Weber, a well-known expert in the field of semiconductor materials, will further contribute to continuing the series' tradition of publishing timely, highly relevant, and long-impacting volumes. Some of the recent volumes, such as Hydrogen in Semiconductors, Imperfections in III/V Materials, Epitaxial Microstructures, High-Speed Heterostructure Devices, Oxygen in Silicon, and others promise that this tradition will be maintained and even expanded.
